Transistor total
Processor | Transistor count | Year | Constructor | Process (nm) | Area (mm 2 ) | Transistor density (tr./mm 2 ) |
MP944 (20-bit, 6-chip, 28 pause total) | 74,442 (5,360 excl. ROM & RAM) [14] [15] | 1970 [12] [a] | Garrett AiResearch | ? | ? | ? |
Intel 4004 (4-bit, 16-pin) | 2,250 | 1971 | Intel | 10,000 nm | 12 mm 2 | 188 |
TMX 1795 (8-bit, 24-pin) | 3,078 [16] | 1971 | Texas Instruments | ? | 30.64 mm 2 | 100.5 |
Intel 8008 (8-bit, 18-pin) | 3,500 | 1972 | Intel | 10,000 nm | 14 mm 2 | 250 |
NEC μCOM-4 (4-bit, 42-pin) | 2,500 [17] [18] | 1973 | NEC | 7,500 nm [19] | ? | ? |
Toshiba TLCS-12 (12-bit) | 11,000+ [20] | 1973 | Toshiba | 6,000 nm | 32.45 mm 2 | 340+ |
Intel 4040 (4-bit, 16-pin) | 3,000 | 1974 | Intel | 10,000 nm | 12 mm 2 | 250 |
Motorola 6800 (8-bit, 40-pin) | 4,100 | 1974 | Motorola | 6,000 nm | 16 mm 2 | 256 |
Intel 8080 (8-bit, 40-pin) | 6,000 | 1974 | Intel | 6,000 nm | 20 mm 2 | Ccc |
TMS 1000 (4-bit, 28-pin) | 8,000 [b] | 1974 [21] | Texas Instruments | 8,000 nm | 11 mm 2 | 730 |
MOS Technology 6502 (8-bit, 40-pin) | 4,528 [c] [22] | 1975 | Influence Technology | 8,000 nm | 21 mm 2 | 216 |
Intersil IM6100 (12-bit, 40-pin; clone of PDP-8 ) | 4,000 | 1975 | Intersil | ? | ? | ? |
CDP 1801 (8-bit, 2-chip, 40-pin) | 5,000 | 1975 | RCA | ? | ? | ? |
RCA 1802 (8-bit, 40-pin) | 5,000 | 1976 | RCA | 5,000 nm | 27 mm 2 | 185 |
Zilog Z80 (8-bit, 4-bit ALU, 40-pin) | 8,500 [d] | 1976 | Zilog | 4,000 nm | 18 mm 2 | 470 |
Intel 8085 (8-bit, 40-pin) | 6,500 | 1976 | Intel | 3,000 nm | 20 mm 2 | 325 |
TMS9900 (16-bit) | 8,000 | 1976 | Texas Instruments | ? | ? | ? |
Bellmac-8 (8-bit) | 7,000 | 1977 | Bell Labs | 5,000 nm | ? | ? |
Motorola 6809 (8-bit with some 16-bit features , 40-pin) | 9,000 | 1978 | Motorola | 5,000 nm | 21 mm 2 | 430 |
Intel 8086 (16-bit, 40-pin) | 29,000 [23] | 1978 | Intel | 3,000 nm | 33 mm 2 | 880 |
Zilog Z8000 (16-bit) | 17,500 [24] | 1979 | Zilog | ? | ? | ? |
Intel 8088 (16-bit, 8-bit data bus) | 29,000 | 1979 | Intel | 3,000 nm | 33 mm 2 | 880 |
Motorola 68000 (16/32-bit, 32-bit registers, 16-bit ALU ) | 68,000 [25] | 1979 | Motorola | 3,500 nm | 44 mm 2 | 1,550 |
Intel 8051 (8-bit, 40-pin) | 50,000 | 1980 | Intel | ? | ? | ? |
WDC 65C02 | 11,500 [26] | 1981 | WDC | 3,000 nm | 6 mm 2 | 1,920 |
ROMP (32-bit) | 45,000 | 1981 | IBM | 2,000 nm | 58.52 mm 2 | 770 |
Intel 80186 (16-bit, 68-pin) | 55,000 | 1982 | Intel | 3,000 nm | 60 mm 2 | 920 |
Intel 80286 (16-bit, 68-pin) | 134,000 | 1982 | Intel | 1,500 nm | 49 mm 2 | 2,730 |
WDC 65C816 (8/16-bit) | 22,000 [27] | 1983 | WDC | 3,000 nm [28] | 9 mm 2 | 2,400 |
NEC V20 | 63,000 | 1984 | NEC | ? | ? | ? |
Motorola 68020 (32-bit; 114 pins used) | 190,000 [29] | 1984 | Motorola | 2,000 nm | 85 mm 2 | 2,200 |
Intel 80386 (32-bit, 132-pin; no cache) | 275,000 | 1985 | Intel | 1,500 nm | 104 mm 2 | 2,640 |
ARM 1 (32-bit; clumsy cache) | 25,000 [29] | 1985 | Acorn | 3,000 nm | 50 mm 2 | 500 |
Novix NC4016 (16-bit) | 16,000 [30] | 1985 [31] | Harris Close-together | 3,000 nm [32] | ? | ? |
SPARC MB86900 (32-bit; no cache) | 110,000 [33] | 1986 | Fujitsu | 1,200 nm | ? | ? |
NEC V60 [34] (32-bit; no cache) | 375,000 | 1986 | NEC | 1,500 nm | ? | ? |
ARM 2 (32-bit, 84-pin; no cache) | 27,000 [35] [29] | 1986 | Acorn | 2,000 nm | 30.25 mm 2 | 890 |
Z80000 (32-bit; very little cache) | 91,000 | 1986 | Zilog | ? | ? | ? |
NEC V70 [34] (32-bit; no cache) | 385,000 | 1987 | NEC | 1,500 nm | ? | ? |
Hitachi Gmicro/200 [36] | 730,000 | 1987 | Hitachi | 1,000 nm | ? | ? |
Motorola 68030 (32-bit, very small caches) | 273,000 | 1987 | Motorola | 800 nm | 102 mm 2 | 2,680 |
TI Explorer's 32-bit Lispmachine chip | 553,000 [37] | 1987 | Texas Instruments | 2,000 nm [38] | ? | ? |
DEC WRL MultiTitan | 180,000 [39] | 1988 | DEC WRL | 1,500 nm | 61 mm 2 | 2,950 |
Intel i960 (32-bit, 33-bit memory subsystem , no cache) | 250,000 [40] | 1988 | Intel | 1,500 nm [41] | ? | ? |
Intel i960CA (32-bit, cache) | 600,000 [41] | 1989 | Intel | 800 nm | 143 mm 2 | 4,200 |
Intel i860 (32/64-bit, 128-bit SIMD, cache, VLIW) | 1,000,000 [42] | 1989 | Intel | ? | ? | ? |
Intel 80486 (32-bit, 8 KB cache) | 1,180,235 | 1989 | Intel | 1,000 nm | 173 mm 2 | 6,822 |
Embitter 3 (32-bit, 4 KB cache) | 310,000 | 1989 | Acorn | 1,500 nm | 87 mm 2 | 3,600 |
POWER1 (9-chip module, 72 kB of cache) | 6,900,000 [43] | 1990 | IBM | 1,000 nm | 1,283.61 mm 2 | 5,375 |
Motorola 68040 (32-bit, 8 KB caches) | 1,200,000 | 1990 | Motorola | 650 nm | 152 mm 2 | 7,900 |
R4000 (64-bit, 16 KB of caches) | 1,350,000 | 1991 | Unit | 1,000 nm | 213 mm 2 | 6,340 |
Displeasing 6 (32-bit, no supply for this 60 variant) | 35,000 | 1991 | ARM | 800 nm | ? | ? |
Hitachi SH-1 (32-bit, no cache) | 600,000 [44] | 1992 [45] | Hitachi | 800 nm | 100 mm 2 | 6,000 |
Intel i960CF (32-bit, cache) | 900,000 [41] | 1992 | Intel | ? | 125 mm 2 | 7,200 |
Alpha 21064 (64-bit, 290-pin; 16 KB of caches) | 1,680,000 | 1992 | DEC | 750 nm | 233.52 mm 2 | 7,190 |
Hitachi HARP-1 (32-bit, cache) | 2,800,000 [46] | 1993 | Hitachi | 500 nm | 267 mm 2 | 10,500 |
Pentium (32-bit, 16 KB of caches) | 3,100,000 | 1993 | Intel | 800 nm | 294 mm 2 | 10,500 |
POWER2 (8-chip module, 288 kB of cache) | 23,037,000 [47] | 1993 | IBM | 720 nm | 1,217.39 mm 2 | 18,923 |
ARM700 (32-bit; 8 KB cache) | 578,977 [48] | 1994 | ARM | 700 nm | 68.51 mm 2 | 8,451 |
MuP21 (21-bit, [49] 40-pin; includes video) | 7,000 [50] | 1994 | Offete Enterprises | 1,200 nm | ? | ? |
Motorola 68060 (32-bit, 16 KB of caches) | 2,500,000 | 1994 | Motorola | 600 nm | 218 mm 2 | 11,500 |
PowerPC 601 (32-bit, 32 KB of caches) | 2,800,000 [51] | 1994 | Apple, IBM, Motorola | 600 nm | 121 mm 2 | 23,000 |
PowerPC 603 (32-bit, 16 KB of caches) | 1,600,000 [52] | 1994 | Apple, IBM, Motorola | 500 nm | 84.76 mm 2 | 18,900 |
PowerPC 603e (32-bit, 32 KB of caches) | 2,600,000 [53] | 1995 | Apple, IBM, Motorola | 500 nm | 98 mm 2 | 26,500 |
Alpha 21164 EV5 (64-bit, 112 kB cache) | 9,300,000 [54] | 1995 | DEC | 500 nm | 298.65 mm 2 | 31,140 |
SA-110 (32-bit, 32 KB of caches) | 2,500,000 [29] | 1995 | Acorn, DEC, Apple | 350 nm | 50 mm 2 | 50,000 |
Pentium Pro (32-bit, 16 KB of caches; [55] L2 cache on-package, however on separate die) | 5,500,000 [56] | 1995 | Intel | 500 nm | 307 mm 2 | 18,000 |
PA-8000 64-bit, rebuff cache | 3,800,000 [57] | 1995 | HP | 500 nm | 337.69 mm 2 | 11,300 |
Entirety 21164A EV56 (64-bit, 112 kB cache) | 9,660,000 [58] | 1996 | DEC | 350 nm | 208.8 mm 2 | 46,260 |
AMD K5 (32-bit, caches) | 4,300,000 | 1996 | AMD | 500 nm | 251 mm 2 | 17,000 |
Pentium II Klamath (32-bit, 64-bit SIMD, caches) | 7,500,000 | 1997 | Intel | 350 nm | 195 mm 2 | 39,000 |
AMD K6 (32-bit, caches) | 8,800,000 | 1997 | AMD | 350 nm | 162 mm 2 | 54,000 |
F21 (21-bit; includes e.g. video) | 15,000 | 1997 [50] | Offete Enterprises | ? | ? | ? |
AVR (8-bit, 40-pin; w/memory) | 140,000 (48,000 excl. memory [59] ) | 1997 | Germanic VLSI/Atmel | ? | ? | ? |
Pentium II Deschutes (32-bit, large cache) | 7,500,000 | 1998 | Intel | 250 nm | 113 mm 2 | 66,000 |
Alpha 21264 EV6 (64-bit) | 15,200,000 [60] | 1998 | DEC | 350 nm | 313.96 mm 2 | 48,400 |
Alpha 21164PC PCA57 (64-bit, 48 kB cache) | 5,700,000 | 1998 | Samsung | 280 nm | 100.5 mm 2 | 56,700 |
Hitachi SH-4 (32-bit, caches) [61] | 3,200,000 [62] | 1998 | Hitachi | 250 nm | 57.76 mm 2 | 55,400 |
ARM 9TDMI (32-bit, no cache) | 111,000 [29] | 1999 | Acorn | 350 nm | 4.8 mm 2 | 23,100 |
Pentium III Katmai (32-bit, 128-bit SIMD, caches) | 9,500,000 | 1999 | Intel | 250 nm | 128 mm 2 | 74,000 |
Feeling Engine (64-bit, 128-bit SIMD, cache) | 10,500,000 [63] – 13,500,000 [64] | 1999 | Sony, Toshiba | 250 nm | 239.7 mm 2 [63] | 43,800 – 56,300 |
Pentium II Mobile Dixon (32-bit, caches) | 27,400,000 | 1999 | Intel | 180 nm | 180 mm 2 | 152,000 |
AMD K6-III (32-bit, caches) | 21,300,000 | 1999 | AMD | 250 nm | 118 mm 2 | 181,000 |
AMD K7 (32-bit, caches) | 22,000,000 | 1999 | AMD | 250 nm | 184 mm 2 | 120,000 |
Gekko (32-bit, large cache) | 21,000,000 [65] | 2000 | IBM, Nintendo | 180 nm | 43 mm 2 | 490,000 (check) |
Pentium III Coppermine (32-bit, large cache) | 21,000,000 | 2000 | Intel | 180 nm | 80 mm 2 | 263,000 |
Pentium 4 Willamette (32-bit, large cache) | 42,000,000 | 2000 | Intel | 180 nm | 217 mm 2 | 194,000 |
SPARC64 V (64-bit, considerable cache) | 191,000,000 [66] | 2001 | Fujitsu | 130 nm [67] | 290 mm 2 | 659,000 |
Pentium III Tualatin (32-bit, large cache) | 45,000,000 | 2001 | Intel | 130 nm | 81 mm 2 | 556,000 |
Pentium 4 Northwood (32-bit, chunky cache) | 55,000,000 | 2002 | Intel | 130 nm | 145 mm 2 | 379,000 |
Itanium 2 President (64-bit, large cache) | 220,000,000 | 2002 | Intel | 180 nm | 421 mm 2 | 523,000 |
Beginning 21364 (64-bit, 946-pin, SIMD, very large caches) | 152,000,000 [13] | 2003 | DEC | 180 nm | 397 mm 2 | 383,000 |
AMD K7Barton (32-bit, large cache) | 54,300,000 | 2003 | AMD | 130 nm | 101 mm 2 | 538,000 |
AMD K8 (64-bit, large cache) | 105,900,000 | 2003 | AMD | 130 nm | 193 mm 2 | 548,700 |
Pentium M Banias (32-bit) | 77,000,000 [68] | 2003 | Intel | 130 nm | 83 mm 2 | 928,000 |
Itanium 2 President 6M (64-bit) | 410,000,000 | 2003 | Intel | 130 nm | 374 mm 2 | 1,096,000 |
PlayStation 2 single chip (CPU + GPU) | 53,500,000 [69] | 2003 [70] | Sony, Toshiba | 90 nm [71] 130 nm [72] [73] | 86 mm 2 | 622,100 |
Pentium 4 Prescott (32-bit, unprofessional cache) | 112,000,000 | 2004 | Intel | 90 nm | 110 mm 2 | 1,018,000 |
Pentium M Dothan (32-bit) | 144,000,000 [74] | 2004 | Intel | 90 nm | 87 mm 2 | 1,655,000 |
SPARC64 V+ (64-bit, large cache) | 400,000,000 [75] | 2004 | Fujitsu | 90 nm | 294 mm 2 | 1,360,000 |
Itanium 2 (64-bit;9 MB cache) | 592,000,000 | 2004 | Intel | 130 nm | 432 mm 2 | 1,370,000 |
Pentium 4 Prescott-2M (32-bit, large cache) | 169,000,000 | 2005 | Intel | 90 nm | 143 mm 2 | 1,182,000 |
Pentium D Smithfield (64-bit, large cache) | 228,000,000 | 2005 | Intel | 90 nm | 206 mm 2 | 1,107,000 |
Xenon (64-bit, 128-bit SIMD, large cache) | 165,000,000 | 2005 | IBM | 90 nm | ? | ? |
Cell (32-bit, cache) | 250,000,000 [76] | 2005 | Sony, IBM, Toshiba | 90 nm | 221 mm 2 | 1,131,000 |
Pentium 4 Wood Mill (32-bit, large cache) | 184,000,000 | 2006 | Intel | 65 nm | 90 mm 2 | 2,044,000 |
Pentium D Presler (64-bit, large cache) | 362,000,000 [77] | 2006 | Intel | 65 nm | 162 mm 2 | 2,235,000 |
Core 2 Doublet Conroe (dual-core 64-bit, bulky caches) | 291,000,000 | 2006 | Intel | 65 nm | 143 mm 2 | 2,035,000 |
Dual-core Itanium 2 (64-bit, SIMD, large caches) | 1,700,000,000 [78] | 2006 | Intel | 90 nm | 596 mm 2 | 2,852,000 |
AMD K10 quad-core 2M L3 (64-bit, large caches) | 463,000,000 [79] | 2007 | AMD | 65 nm | 283 mm 2 | 1,636,000 |
ARM Cortex-A9 (32-bit, (optional) SIMD, caches) | 26,000,000 [80] | 2007 | ARM | 45 nm | 31 mm 2 | 839,000 |
Core 2 Duo Wolfdale (dual-core 64-bit, SIMD, caches) | 411,000,000 | 2007 | Intel | 45 nm | 107 mm 2 | 3,841,000 |
POWER6 (64-bit, large caches) | 789,000,000 | 2007 | IBM | 65 nm | 341 mm 2 | 2,314,000 |
Core 2 Duo Allendale (dual-core 64-bit, SIMD, chunky caches) | 169,000,000 | 2007 | Intel | 65 nm | 111 mm 2 | 1,523,000 |
Uniphier | 250,000,000 [81] | 2007 | Matsushita | 45 nm | ? | ? |
SPARC64 VI (64-bit, SIMD, large caches) | 540,000,000 | 2007 [82] | Fujitsu | 90 nm | 421 mm 2 | 1,283,000 |
Core 2 Duo Wolfdale 3M (dual-core 64-bit, SIMD, large caches) | 230,000,000 | 2008 | Intel | 45 nm | 83 mm 2 | 2,771,000 |
Core i7 (quad-core 64-bit, SIMD, large caches) | 731,000,000 | 2008 | Intel | 45 nm | 263 mm 2 | 2,779,000 |
AMD K10 quad-core 6M L3 (64-bit, SIMD, large caches) | 758,000,000 [79] | 2008 | AMD | 45 nm | 258 mm 2 | 2,938,000 |
Atom (32-bit, large cache) | 47,000,000 | 2008 | Intel | 45 nm | 24 mm 2 | 1,958,000 |
SPARC64 Heptad (64-bit, SIMD, large caches) | 600,000,000 | 2008 [83] | Fujitsu | 65 nm | 445 mm 2 | 1,348,000 |
Six-core Xeon 7400 (64-bit, SIMD, cavernous caches) | 1,900,000,000 | 2008 | Intel | 45 nm | 503 mm 2 | 3,777,000 |
Six-core Opteron 2400 (64-bit, SIMD, large caches) | 904,000,000 | 2009 | AMD | 45 nm | 346 mm 2 | 2,613,000 |
SPARC64 VIIIfx (64-bit, SIMD, large caches) | 760,000,000 [84] | 2009 | Fujitsu | 45 nm | 513 mm 2 | 1,481,000 |
Atom (Pineview) 64-bit, 1-core, 512 kB L2 store | 123,000,000 [85] | 2010 | Intel | 45 nm | 66 mm 2 | 1,864,000 |
Atom (Pineview) 64-bit, 2-core, 1 Gash L2 cache | 176,000,000 [86] | 2010 | Intel | 45 nm | 87 mm 2 | 2,023,000 |
SPARC T3 (16-core 64-bit, SIMD, large caches) | 1,000,000,000 [87] | 2010 | Sun/Oracle | 40 nm | 377 mm 2 | 2,653,000 |
Six-core Core i7 (Gulftown) | 1,170,000,000 | 2010 | Intel | 32 nm | 240 mm 2 | 4,875,000 |
POWER7 32M L3 (8-core 64-bit, SIMD, chunky caches) | 1,200,000,000 | 2010 | IBM | 45 nm | 567 mm 2 | 2,116,000 |
Quad-core z196 [88] (64-bit, very necessary caches) | 1,400,000,000 | 2010 | IBM | 45 nm | 512 mm 2 | 2,734,000 |
Quad-core Itanium Tukwila (64-bit, SIMD, large caches) | 2,000,000,000 [89] | 2010 | Intel | 65 nm | 699 mm 2 | 2,861,000 |
XeonNehalem-EX (8-core 64-bit, SIMD, large caches) | 2,300,000,000 [90] | 2010 | Intel | 45 nm | 684 mm 2 | 3,363,000 |
SPARC64 IXfx (64-bit, SIMD, large caches) | 1,870,000,000 [91] | 2011 | Fujitsu | 40 nm | 484 mm 2 | 3,864,000 |
Quad-core + GPUCore i7 (64-bit, SIMD, large caches) | 1,160,000,000 | 2011 | Intel | 32 nm | 216 mm 2 | 5,370,000 |
Six-core Foundation i7/8-core Xeon E5 (Sandy Bridge-E/EP) (64-bit, SIMD, crackdown caches) | 2,270,000,000 [92] | 2011 | Intel | 32 nm | 434 mm 2 | 5,230,000 |
XeonWestmere-EX (10-core 64-bit, SIMD, lax caches) | 2,600,000,000 | 2011 | Intel | 32 nm | 512 mm 2 | 5,078,000 |
Atom "Medfield" (64-bit) | 432,000,000 [93] | 2012 | Intel | 32 nm | 64 mm 2 | 6,750,000 |
SPARC64 Limitation (64-bit, SIMD, caches) | 2,990,000,000 [94] | 2012 | Fujitsu | 28 nm | 600 mm 2 | 4,983,000 |
AMD Bulldozer (8-core 64-bit, SIMD, caches) | 1,200,000,000 [95] | 2012 | AMD | 32 nm | 315 mm 2 | 3,810,000 |
Quad-core + GPU AMD Trinity (64-bit, SIMD, caches) | 1,303,000,000 | 2012 | AMD | 32 nm | 246 mm 2 | 5,297,000 |
Quad-core + GPU Core i7 Ivy Go across (64-bit, SIMD, caches) | 1,400,000,000 | 2012 | Intel | 22 nm | 160 mm 2 | 8,750,000 |
POWER7+ (8-core 64-bit, SIMD, 80 MB L3 cache) | 2,100,000,000 | 2012 | IBM | 32 nm | 567 mm 2 | 3,704,000 |
Six-core zEC12 (64-bit, SIMD, large caches) | 2,750,000,000 | 2012 | IBM | 32 nm | 597 mm 2 | 4,606,000 |
Itanium Poulson (8-core 64-bit, SIMD, caches) | 3,100,000,000 | 2012 | Intel | 32 nm | 544 mm 2 | 5,699,000 |
Xeon Phi (61-core 32-bit, 512-bit SIMD, caches) | 5,000,000,000 [96] | 2012 | Intel | 22 nm | 720 mm 2 | 6,944,000 |
Apple A7 (dual-core 64/32-bit ARM64, "mobile SoC", SIMD, caches) | 1,000,000,000 | 2013 | Apple | 28 nm | 102 mm 2 | 9,804,000 |
Six-core Core i7 Vine Bridge E (64-bit, SIMD, caches) | 1,860,000,000 | 2013 | Intel | 22 nm | 256 mm 2 | 7,266,000 |
POWER8 (12-core 64-bit, SIMD, caches) | 4,200,000,000 | 2013 | IBM | 22 nm | 650 mm 2 | 6,462,000 |
Xbox Combine main SoC (64-bit, SIMD, caches) | 5,000,000,000 | 2013 | Microsoft, AMD | 28 nm | 363 mm 2 | 13,770,000 |
Quad-core + GPU Core i7 Haswell (64-bit, SIMD, caches) | 1,400,000,000 [97] | 2014 | Intel | 22 nm | 177 mm 2 | 7,910,000 |
Apple A8 (dual-core 64/32-bit ARM64 "mobile SoC", SIMD, caches) | 2,000,000,000 | 2014 | Apple | 20 nm | 89 mm 2 | 22,470,000 |
Core i7 Haswell-E (8-core 64-bit, SIMD, caches) | 2,600,000,000 [98] | 2014 | Intel | 22 nm | 355 mm 2 | 7,324,000 |
Apple A8X (tri-core 64/32-bit ARM64 "mobile SoC", SIMD, caches) | 3,000,000,000 [99] | 2014 | Apple | 20 nm | 128 mm 2 | 23,440,000 |
Xeon Vine Bridge-EX (15-core 64-bit, SIMD, caches) | 4,310,000,000 [100] | 2014 | Intel | 22 nm | 541 mm 2 | 7,967,000 |
Xeon Haswell-E5 (18-core 64-bit, SIMD, caches) | 5,560,000,000 [101] | 2014 | Intel | 22 nm | 661 mm 2 | 8,411,000 |
Quad-core + GPU GT2 Join together i7 Skylake K (64-bit, SIMD, caches) | 1,750,000,000 | 2015 | Intel | 14 nm | 122 mm 2 | 14,340,000 |
Dual-core + GPU Iris Core i7 Broadwell-U (64-bit, SIMD, caches) | 1,900,000,000 [102] | 2015 | Intel | 14 nm | 133 mm 2 | 14,290,000 |
Apple A9 (dual-core 64/32-bit ARM64 "mobile SoC", SIMD, caches) | 2,000,000,000+ | 2015 | Apple | 14 nm (Samsung) | 96 mm 2 (Samsung) | 20,800,000+ |
16 nm (TSMC) | 104.5 mm 2 (TSMC) | 19,100,000+ |
Apple A9X (dual core 64/32-bit ARM64 "mobile SoC", SIMD, caches) | 3,000,000,000+ | 2015 | Apple | 16 nm | 143.9 mm 2 | 20,800,000+ |
IBM z13 (64-bit, caches) | 3,990,000,000 | 2015 | IBM | 22 nm | 678 mm 2 | 5,885,000 |
IBM z13 Storage Somebody | 7,100,000,000 | 2015 | IBM | 22 nm | 678 mm 2 | 10,472,000 |
SPARC M7 (32-core 64-bit, SIMD, caches) | 10,000,000,000 [103] | 2015 | Oracle | 20 nm | ? | ? |
Core i7 Broadwell-E (10-core 64-bit, SIMD, caches) | 3,200,000,000 [104] | 2016 | Intel | 14 nm | 246 mm 2 [105] | 13,010,000 |
Apple A10 Fusion (quad-core 64/32-bit ARM64 "mobile SoC", SIMD, caches) | 3,300,000,000 | 2016 | Apple | 16 nm | 125 mm 2 | 26,400,000 |
HiSilicon Kirin 960 (octa-core 64/32-bit ARM64 "mobile SoC", SIMD, caches) | 4,000,000,000 [106] | 2016 | Huawei | 16 nm | 110.00 mm 2 | 36,360,000 |
Xeon Broadwell-E5 (22-core 64-bit, SIMD, caches) | 7,200,000,000 [107] | 2016 | Intel | 14 nm | 456 mm 2 | 15,790,000 |
Xeon Phi (72-core 64-bit, 512-bit SIMD, caches) | 8,000,000,000 | 2016 | Intel | 14 nm | 683 mm 2 | 11,710,000 |
Accommodate oneself to CPU (32-bit, for FPGAs) | 1,286 6-LUTs [108] | 2016 | Gisselquist Technology | ? | ? | ? |
Qualcomm Snapdragon 835 (octa-core 64/32-bit ARM64 "mobile SoC", SIMD, caches) | 3,000,000,000 [109] [110] | 2016 | Qualcomm | 10 nm | 72.3 mm 2 | 41,490,000 |
Apple A11 Bionic (hexa-core 64/32-bit ARM64 "mobile SoC", SIMD, caches) | 4,300,000,000 | 2017 | Apple | 10 nm | 89.23 mm 2 | 48,190,000 |
AMD Zen CCX (core intricate unit: 4 cores, 8 MB L3 cache) | 1,400,000,000 [111] | 2017 | AMD | 14 nm (GF 14LPP) | 44 mm 2 | 31,800,000 |
AMD Aircraft SoC Ryzen (64-bit, SIMD, caches) | 4,800,000,000 [112] | 2017 | AMD | 14 nm | 192 mm 2 | 25,000,000 |
AMD Ryzen 5 1600 Ryzen (64-bit, SIMD, caches) | 4,800,000,000 [113] | 2017 | AMD | 14 nm | 213 mm 2 | 22,530,000 |
IBM z14 (64-bit, SIMD, caches) | 6,100,000,000 | 2017 | IBM | 14 nm | 696 mm 2 | 8,764,000 |
IBM z14 Storage Controller (64-bit) | 9,700,000,000 | 2017 | IBM | 14 nm | 696 mm 2 | 13,940,000 |
HiSilicon Kirin 970 (octa-core 64/32-bit ARM64 "mobile SoC", SIMD, caches) | 5,500,000,000 [114] | 2017 | Huawei | 10 nm | 96.72 mm 2 | 56,900,000 |
Xbox One X (Project Scorpio) main SoC (64-bit, SIMD, caches) | 7,000,000,000 [115] | 2017 | Microsoft, AMD | 16 nm | 360 mm 2 [115] | 19,440,000 |
Xeon Platinum 8180 (28-core 64-bit, SIMD, caches) | 8,000,000,000 [116] | 2017 | Intel | 14 nm | ? | ? |
Xeon (unspecified) | 7,100,000,000 [117] | 2017 | Intel | 14 nm | 672 mm 2 | 10,570,000 |
POWER9 (64-bit, SIMD, caches) | 8,000,000,000 | 2017 | IBM | 14 nm | 695 mm 2 | 11,500,000 |
Freedom U500 Base Platform Chip (E51, 4×U54) RISC-V (64-bit, caches) | 250,000,000 [118] | 2017 | SiFive | 28 nm | ~30 mm 2 | 8,330,000 |
SPARC64 Dozen (12-core 64-bit, SIMD, caches) | 5,450,000,000 [119] | 2017 | Fujitsu | 20 nm | 795 mm 2 | 6,850,000 |
Apple A10X Fusion (hexa-core 64/32-bit ARM64 "mobile SoC", SIMD, caches) | 4,300,000,000 [120] | 2017 | Apple | 10 nm | 96.40 mm 2 | 44,600,000 |
Centriq 2400 (64/32-bit, SIMD, caches) | 18,000,000,000 [121] | 2017 | Qualcomm | 10 nm | 398 mm 2 | 45,200,000 |
AMD Epyc (32-core 64-bit, SIMD, caches) | 19,200,000,000 | 2017 | AMD | 14 nm | 768 mm 2 | 25,000,000 |
Qualcomm Snapdragon 845 (octa-core 64/32-bit ARM64 "mobile SoC", SIMD, caches) | 5,300,000,000 [122] | 2017 | Qualcomm | 10 nm | 94 mm 2 | 56,400,000 |
Qualcomm Snapdragon 850 (octa-core 64/32-bit ARM64 "mobile SoC", SIMD, caches) | 5,300,000,000 [123] | 2017 | Qualcomm | 10 nm | 94 mm 2 | 56,400,000 |
HiSilicon Kirin 710 (octa-core ARM64 "mobile SoC", SIMD, caches) | 5,500,000,000 [124] | 2018 | Huawei | 12 nm | ? | ? |
Apple A12 Bionic (hexa-core ARM64 "mobile SoC", SIMD, caches) | 6,900,000,000 [125] [126] | 2018 | Apple | 7 nm | 83.27 mm 2 | 82,900,000 |
HiSilicon Kirin 980 (octa-core ARM64 "mobile SoC", SIMD, caches) | 6,900,000,000 [127] | 2018 | Huawei | 7 nm | 74.13 mm 2 | 93,100,000 |
Qualcomm Snapdragon 8cx / SCX8180 (octa-core ARM64 "mobile SoC", SIMD, caches) | 8,500,000,000 [128] | 2018 | Qualcomm | 7 nm | 112 mm 2 | 75,900,000 |
Apple A12X Bionic (octa-core 64/32-bit ARM64 "mobile SoC", SIMD, caches) | 10,000,000,000 [129] | 2018 | Apple | 7 nm | 122 mm 2 | 82,000,000 |
Fujitsu A64FX (64/32-bit, SIMD, caches) | 8,786,000,000 [130] | 2018 [131] | Fujitsu | 7 nm | ? | ? |
Tegra Missionary SoC (64/32-bit) | 9,000,000,000 [132] | 2018 | Nvidia | 12 nm | 350 mm 2 | 25,700,000 |
Qualcomm Snapdragon 855 (octa-core 64/32-bit ARM64 "mobile SoC", SIMD, caches) | 6,700,000,000 [133] | 2018 | Qualcomm | 7 nm | 73 mm 2 | 91,800,000 |
AMD Zen 2 centre (0.5 MB L2 + 4 MB L3 cache) | 475,000,000 [134] | 2019 | AMD | 7 nm | 7.83 mm 2 | 60,664,000 |
AMD Foolhardy 2 CCX (core complex: 4 cores, 16 Preview L3 cache) | 1,900,000,000 [134] | 2019 | AMD | 7 nm | 31.32 mm 2 | 60,664,000 |
AMD Zen 2 CCD (core complex die: 8 cores, 32 MB L3 cache) | 3,800,000,000 [134] | 2019 | AMD | 7 nm | 74 mm 2 | 51,350,000 |
AMD Zen 2 client I/O die | 2,090,000,000 [134] | 2019 | AMD | 12 nm | 125 mm 2 | 16,720,000 |
AMD Zen 2 server I/O die | 8,340,000,000 [134] | 2019 | AMD | 12 nm | 416 mm 2 | 20,050,000 |
AMD Zen 2 Renoir give way | 9,800,000,000 [134] | 2019 | AMD | 7 nm | 156 mm 2 | 62,820,000 |
AMDRyzen 7 3700X (64-bit, SIMD, caches, I/O die) | 5,990,000,000 [135] [e] | 2019 | AMD | 7 & 12 nm (TSMC) | 199 (74+125) mm 2 | 30,100,000 |
HiSilicon Kirin 990 4G | 8,000,000,000 [136] | 2019 | Huawei | 7 nm | 90.00 mm 2 | 89,000,000 |
Apple A13 (hexa-core 64-bit ARM64 "mobile SoC", SIMD, caches) | 8,500,000,000 [137] [138] | 2019 | Apple | 7 nm | 98.48 mm 2 | 86,300,000 |
IBM z15 CP chip (12 cores, 256 MB L3 cache) | 9,200,000,000 [139] | 2019 | IBM | 14 nm | 696 mm 2 | 13,220,000 |
IBM z15 SC chip (960 Analysis L4 cache) | 12,200,000,000 | 2019 | IBM | 14 nm | 696 mm 2 | 17,530,000 |
AMDRyzen 9 3900X (64-bit, SIMD, caches, I/O die) | 9,890,000,000 [140] [141] | 2019 | AMD | 7 & 12 nm (TSMC) | 273 mm 2 | 36,230,000 |
HiSilicon Kirin 990 5G | 10,300,000,000 [142] | 2019 | Huawei | 7 nm | 113.31 mm 2 | 90,900,000 |
AWS Graviton2 (64-bit, 64-core ARM-based, SIMD, caches) [143] [144] | 30,000,000,000 | 2019 | Amazon | 7 nm | ? | ? |
AMD Epyc Rome (64-bit, SIMD, caches) | 39,540,000,000 [140] [141] | 2019 | AMD | 7 & 12 nm (TSMC) | 1,008 mm 2 | 39,226,000 |
Qualcomm Snapdragon 865 (octa-core 64/32-bit ARM64 "mobile SoC", SIMD, caches) | 10,300,000,000 [145] | 2019 | Qualcomm | 7 nm | 83.54 mm 2 [146] | 123,300,000 |
TI Jacinto TDA4VM (ARM A72, DSP, SRAM) | 3,500,000,000 [147] | 2020 | Texas Mechanism | 16 nm | ? | ? |
Apple A14 Bionic (hexa-core 64-bit ARM64 "mobile SoC", SIMD, caches) | 11,800,000,000 [148] | 2020 | Apple | 5 nm | 88 mm 2 | 134,100,000 |
Apple M1 (octa-core 64-bit ARM64 SoC, SIMD, caches) | 16,000,000,000 [149] | 2020 | Apple | 5 nm | 119 mm 2 | 134,500,000 |
HiSilicon Kirin 9000 | 15,300,000,000 [150] [151] | 2020 | Huawei | 5 nm | 114 mm 2 | 134,200,000 |
AMD Zen 3 CCX (core complex unit: 8 cores, 32 MB L3 cache) | 4,080,000,000 [152] | 2020 | AMD | 7 nm | 68 mm 2 | 60,000,000 |
AMD Zen 3 CCD (core complex die) | 4,150,000,000 [152] | 2020 | AMD | 7 nm | 81 mm 2 | 51,230,000 |
Core 11th gen Rise rapidly Lake (8-core 64-bit, SIMD, large caches) | 6,000,000,000+ [153] | 2021 | Intel | 14 nm +++ 14 nm | 276 mm 2 [154] | 37,500,000 or 21,800,000+ [155] |
AMD Ryzen 7 5800H (64-bit, SIMD, caches, I/O plus GPU) | 10,700,000,000 [156] | 2021 | AMD | 7 nm | 180 mm 2 | 59,440,000 |
AMD Epyc 7763 (Milan) (64-core, 64-bit) | ? | 2021 | AMD | 7 & 12 nm (TSMC) | 1,064 mm 2 (8×81+416) [157] | ? |
Apple A15 | 15,000,000,000 [158] [159] | 2021 | Apple | 5 nm | 107.68 mm 2 | 139,300,000 |
Apple M1 Pro (10-core, 64-bit) | 33,700,000,000 [160] | 2021 | Apple | 5 nm | 245 mm 2 [161] | 137,600,000 |
Apple M1 Max (10-core, 64-bit) | 57,000,000,000 [162] [160] | 2021 | Apple | 5 nm | 420.2 mm 2 [163] | 135,600,000 |
Power10 dual-chip module (30 SMT8 cores or 60 SMT4 cores) | 36,000,000,000 [164] | 2021 | IBM | 7 nm | 1,204 mm 2 | 29,900,000 |
Dimensity 9000 (ARM64 SoC) | 15,300,000,000 [165] [166] | 2021 | Mediatek | 4 nm (TSMC N4) | ? | ? |
Apple A16 (ARM64 SoC) | 16,000,000,000 [167] [168] [169] | 2022 | Apple | 4 nm | ? | ? |
Apple M1 Extreme (dual-chip module, 2×10 cores) | 114,000,000,000 [170] [171] | 2022 | Apple | 5 nm | 840.5 mm 2 [163] | 135,600,000 |
AMD Epyc 7773X (Milan-X) (multi-chip module, 64 cores, 768 MB L3 cache) | 26,000,000,000 + Milan [172] | 2022 | AMD | 7 & 12 nm (TSMC) | 1,352 mm 2 (Milan + 8×36) [172] | ? |
IBM Telum dual-chip module (2×8 cores, 2×256 MB cache) | 45,000,000,000 [173] [174] | 2022 | IBM | 7 nm (Samsung) | 1,060 mm 2 | 42,450,000 |
Apple M2 (deca-core 64-bit ARM64 SoC, SIMD, caches) | 20,000,000,000 [175] | 2022 | Apple | 5 nm | ? | ? |
Dimensity 9200 (ARM64 SoC) | 17,000,000,000 [176] [177] [178] | 2022 | Mediatek | 4 nm (TSMC N4P) | ? | ? |
Qualcomm Snapdragon 8 Gen 2 (octa-core ARM64 "mobile SoC", SIMD, caches) | 16,000,000,000 | 2022 | Qualcomm | 4 nm | 268 mm 2 | 59,701,492 |
AMD EPYC Genoa (4th gen/9004 series) 13-chip module (up be 96 cores and 384 MB (L3) + 96 MB (L2) cache) [179] | 90,000,000,000 [180] [181] | 2022 | AMD | 5 nm (CCD) 6 nm (IOD) | 1,263.34 mm 2 12×72.225 (CCD) 396.64 (IOD) [182] [183] | 71,240,000 |
HiSilicon Kirin 9000s | 9,510,000,000 [184] | 2023 | Huawei | 7 nm | 107 mm 2 | 107,690,000 |
Apple M4 (deca-core 64-bit ARM64 SoC, SIMD, caches) | 28,000,000,000 [185] | 2024 | Apple | 3 nm | ? | ? |
Apple M3 (octa-core 64-bit ARM64 SoC, SIMD, caches) | 25,000,000,000 [186] | 2023 | Apple | 3 nm | ? | ? |
Apple M3 Pro (dodeca-core 64-bit ARM64 SoC, SIMD, caches) | 37,000,000,000 [186] | 2023 | Apple | 3 nm | ? | ? |
Apple M3 Max (16-core 64-bit ARM64 SoC, SIMD, caches) | 92,000,000,000 [186] | 2023 | Apple | 3 nm | ? | ? |
Apple A17 | 19,000,000,000 [187] | 2023 | Apple | 3 nm | 103.8 mm 2 | 183,044,315 |
Sapphire Rapids quad-chip module (up to 60 cores and 112.5 Jumble of cache) [188] | 44,000,000,000– 48,000,000,000 [189] | 2023 | Intel | 10 nm ESF (Intel 7) | 1,600 mm 2 | 27,500,000– 30,000,000 |
Apple M2 Pro (12-core 64-bit ARM64 SoC, SIMD, caches) | 40,000,000,000 [190] | 2023 | Apple | 5 nm | ? | ? |
Apple M2 Max (12-core 64-bit ARM64 SoC, SIMD, caches) | 67,000,000,000 [190] | 2023 | Apple | 5 nm | ? | ? |
Apple M2 Die-hard (two M2 Max dies) | 134,000,000,000 [6] | 2023 | Apple | 5 nm | ? | ? |
AMD Epyc Bergamo (4th gen/97X4 series) 9-chip final (up to 128 cores and 256 MB (L3) + 128 MB (L2) cache) | 82,000,000,000 [191] | 2023 | AMD | 5 nm (CCD) 6 nm (IOD) | ? | ? |
AMD Instinct MI300A (multi-chip module, 24 cores, 128 GB GPU memory + 256 MB (LLC/L3) cache) | 146,000,000,000 [192] [193] | 2023 | AMD | 5 nm (CCD, GCD) 6 nm (IOD) | 1,017 mm 2 | 144,000,000 |
In britain director | Transistor misinformation | Year | Designer | Process (nm) | Area (mm 2 ) | Transistor density (tr./mm 2 ) |